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Searched refs:REG_CMCC_MSR (Results 1 – 6 of 6) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dcmcc.h44 #define REG_CMCC_MSR (0x400C4034U) /**< \brief (CMCC) Cache Monitor Status Register */ macro
55 #define REG_CMCC_MSR (*(RoReg*)0x400C4034U) /**< \brief (CMCC) Cache Monitor Status Register */ macro
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Dcmcc.h45 #define REG_CMCC_MSR (0x41006034) /**< \brief (CMCC) Cache Monitor Status Register */ macro
57 #define REG_CMCC_MSR (*(RoReg *)0x41006034UL) /**< \brief (CMCC) Cache Monitor Statu… macro
/hal_atmel-latest/asf/sam0/include/same53/instance/
Dcmcc.h45 #define REG_CMCC_MSR (0x41006034) /**< \brief (CMCC) Cache Monitor Status Register */ macro
57 #define REG_CMCC_MSR (*(RoReg *)0x41006034UL) /**< \brief (CMCC) Cache Monitor Statu… macro
/hal_atmel-latest/asf/sam0/include/same51/instance/
Dcmcc.h45 #define REG_CMCC_MSR (0x41006034) /**< \brief (CMCC) Cache Monitor Status Register */ macro
57 #define REG_CMCC_MSR (*(RoReg *)0x41006034UL) /**< \brief (CMCC) Cache Monitor Statu… macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dcmcc.h45 #define REG_CMCC_MSR (0x41006034) /**< \brief (CMCC) Cache Monitor Status Register */ macro
57 #define REG_CMCC_MSR (*(RoReg *)0x41006034UL) /**< \brief (CMCC) Cache Monitor Statu… macro
/hal_atmel-latest/asf/sam/include/sam4s/instance/
Dcmcc.h44 …#define REG_CMCC_MSR (0x4007C034U) /**< \brief (CMCC) Cache Controller Monitor… macro
55 …#define REG_CMCC_MSR (*(__I uint32_t*)0x4007C034U) /**< \brief (CMCC) Cache Controller Monitor… macro