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Searched refs:REG_CMCC_MCFG (Results 1 – 6 of 6) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dcmcc.h41 #define REG_CMCC_MCFG (0x400C4028U) /**< \brief (CMCC) Cache Monitor Configuration Regis… macro
52 #define REG_CMCC_MCFG (*(RwReg*)0x400C4028U) /**< \brief (CMCC) Cache Monitor Configuration Regis… macro
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Dcmcc.h42 #define REG_CMCC_MCFG (0x41006028) /**< \brief (CMCC) Cache Monitor Configuration Regi… macro
54 #define REG_CMCC_MCFG (*(RwReg *)0x41006028UL) /**< \brief (CMCC) Cache Monitor Confi… macro
/hal_atmel-latest/asf/sam0/include/same53/instance/
Dcmcc.h42 #define REG_CMCC_MCFG (0x41006028) /**< \brief (CMCC) Cache Monitor Configuration Regi… macro
54 #define REG_CMCC_MCFG (*(RwReg *)0x41006028UL) /**< \brief (CMCC) Cache Monitor Confi… macro
/hal_atmel-latest/asf/sam0/include/same51/instance/
Dcmcc.h42 #define REG_CMCC_MCFG (0x41006028) /**< \brief (CMCC) Cache Monitor Configuration Regi… macro
54 #define REG_CMCC_MCFG (*(RwReg *)0x41006028UL) /**< \brief (CMCC) Cache Monitor Confi… macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dcmcc.h42 #define REG_CMCC_MCFG (0x41006028) /**< \brief (CMCC) Cache Monitor Configuration Regi… macro
54 #define REG_CMCC_MCFG (*(RwReg *)0x41006028UL) /**< \brief (CMCC) Cache Monitor Confi… macro
/hal_atmel-latest/asf/sam/include/sam4s/instance/
Dcmcc.h41 …#define REG_CMCC_MCFG (0x4007C028U) /**< \brief (CMCC) Cache Controller Monitor… macro
52 …#define REG_CMCC_MCFG (*(__IO uint32_t*)0x4007C028U) /**< \brief (CMCC) Cache Controller Monitor… macro