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Searched refs:REG_CMCC_MAINT1 (Results 1 – 6 of 6) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dcmcc.h40 #define REG_CMCC_MAINT1 (0x400C4024U) /**< \brief (CMCC) Cache Maintenance Register 1 */ macro
51 #define REG_CMCC_MAINT1 (*(WoReg*)0x400C4024U) /**< \brief (CMCC) Cache Maintenance Register 1 */ macro
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Dcmcc.h41 #define REG_CMCC_MAINT1 (0x41006024) /**< \brief (CMCC) Cache Maintenance Register 1 */ macro
53 #define REG_CMCC_MAINT1 (*(WoReg *)0x41006024UL) /**< \brief (CMCC) Cache Maintenance R… macro
/hal_atmel-latest/asf/sam0/include/same53/instance/
Dcmcc.h41 #define REG_CMCC_MAINT1 (0x41006024) /**< \brief (CMCC) Cache Maintenance Register 1 */ macro
53 #define REG_CMCC_MAINT1 (*(WoReg *)0x41006024UL) /**< \brief (CMCC) Cache Maintenance R… macro
/hal_atmel-latest/asf/sam0/include/same51/instance/
Dcmcc.h41 #define REG_CMCC_MAINT1 (0x41006024) /**< \brief (CMCC) Cache Maintenance Register 1 */ macro
53 #define REG_CMCC_MAINT1 (*(WoReg *)0x41006024UL) /**< \brief (CMCC) Cache Maintenance R… macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dcmcc.h41 #define REG_CMCC_MAINT1 (0x41006024) /**< \brief (CMCC) Cache Maintenance Register 1 */ macro
53 #define REG_CMCC_MAINT1 (*(WoReg *)0x41006024UL) /**< \brief (CMCC) Cache Maintenance R… macro
/hal_atmel-latest/asf/sam/include/sam4s/instance/
Dcmcc.h40 …#define REG_CMCC_MAINT1 (0x4007C024U) /**< \brief (CMCC) Cache Controller Mainten… macro
51 …#define REG_CMCC_MAINT1 (*(__O uint32_t*)0x4007C024U) /**< \brief (CMCC) Cache Controller Mainten… macro