Searched refs:REG_AFEC1_ISR (Results 1 – 5 of 5) sorted by relevance
47 #define REG_AFEC1_ISR (0x400B4030U) /**< \brief (AFEC1) Interrupt Status Register */ macro80 #define REG_AFEC1_ISR (*(RoReg*)0x400B4030U) /**< \brief (AFEC1) Interrupt Status Register */ macro
49 #define REG_AFEC1_ISR (0x40064030) /**< (AFEC1) AFEC Interrupt Status Register */ macro82 #define REG_AFEC1_ISR (*(__I uint32_t*)0x40064030U) /**< (AFEC1) AFEC Interrupt Status R… macro
49 #define REG_AFEC1_ISR (0x40064030) /**< (AFEC1) AFEC Interrupt Status Register */ macro81 #define REG_AFEC1_ISR (*(__I uint32_t*)0x40064030U) /**< (AFEC1) AFEC Interrupt Status R… macro
