Searched refs:REG_AFEC1_IER (Results 1 – 5 of 5) sorted by relevance
44 #define REG_AFEC1_IER (0x400B4024U) /**< \brief (AFEC1) Interrupt Enable Register */ macro77 #define REG_AFEC1_IER (*(WoReg*)0x400B4024U) /**< \brief (AFEC1) Interrupt Enable Register */ macro
46 #define REG_AFEC1_IER (0x40064024) /**< (AFEC1) AFEC Interrupt Enable Register */ macro79 #define REG_AFEC1_IER (*(__O uint32_t*)0x40064024U) /**< (AFEC1) AFEC Interrupt Enable R… macro
46 #define REG_AFEC1_IER (0x40064024) /**< (AFEC1) AFEC Interrupt Enable Register */ macro78 #define REG_AFEC1_IER (*(__O uint32_t*)0x40064024U) /**< (AFEC1) AFEC Interrupt Enable R… macro
