Searched refs:REG_AFEC1_IDR (Results 1 – 5 of 5) sorted by relevance
45 #define REG_AFEC1_IDR (0x400B4028U) /**< \brief (AFEC1) Interrupt Disable Register */ macro78 #define REG_AFEC1_IDR (*(WoReg*)0x400B4028U) /**< \brief (AFEC1) Interrupt Disable Register */ macro
47 #define REG_AFEC1_IDR (0x40064028) /**< (AFEC1) AFEC Interrupt Disable Register */ macro80 #define REG_AFEC1_IDR (*(__O uint32_t*)0x40064028U) /**< (AFEC1) AFEC Interrupt Disable … macro
47 #define REG_AFEC1_IDR (0x40064028) /**< (AFEC1) AFEC Interrupt Disable Register */ macro79 #define REG_AFEC1_IDR (*(__O uint32_t*)0x40064028U) /**< (AFEC1) AFEC Interrupt Disable … macro
