Searched refs:REG_AFEC1_CSELR (Results 1 – 5 of 5) sorted by relevance
53 #define REG_AFEC1_CSELR (0x400B4064U) /**< \brief (AFEC1) Channel Register Selection */ macro86 #define REG_AFEC1_CSELR (*(RoReg*)0x400B4064U) /**< \brief (AFEC1) Channel Register Selection */ macro
54 #define REG_AFEC1_CSELR (0x40064064) /**< (AFEC1) AFEC Channel Selection Register */ macro87 #define REG_AFEC1_CSELR (*(__IO uint32_t*)0x40064064U) /**< (AFEC1) AFEC Channel Selection … macro
54 #define REG_AFEC1_CSELR (0x40064064) /**< (AFEC1) AFEC Channel Selection Register */ macro86 #define REG_AFEC1_CSELR (*(__IO uint32_t*)0x40064064U) /**< (AFEC1) AFEC Channel Selection … macro
