Home
last modified time | relevance | path

Searched refs:REG_AFEC1_CHSR (Results 1 – 5 of 5) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam4e/instance/
Dafec1.h42 #define REG_AFEC1_CHSR (0x400B401CU) /**< \brief (AFEC1) Channel Status Register */ macro
75 #define REG_AFEC1_CHSR (*(RoReg*)0x400B401CU) /**< \brief (AFEC1) Channel Status Register */ macro
/hal_atmel-latest/asf/sam/include/samv71/instance/
Dafec1.h44 #define REG_AFEC1_CHSR (0x4006401C) /**< (AFEC1) AFEC Channel Status Register */ macro
77 #define REG_AFEC1_CHSR (*(__I uint32_t*)0x4006401CU) /**< (AFEC1) AFEC Channel Status Reg… macro
/hal_atmel-latest/asf/sam/include/same70/instance/
Dafec1.h44 #define REG_AFEC1_CHSR (0x4006401C) /**< (AFEC1) AFEC Channel Status Register */ macro
76 #define REG_AFEC1_CHSR (*(__I uint32_t*)0x4006401CU) /**< (AFEC1) AFEC Channel Status Reg… macro
/hal_atmel-latest/asf/sam/include/samv71b/instance/
Dafec1.h44 #define REG_AFEC1_CHSR (0x4006401C) /**< (AFEC1) AFEC Channel Status Register */ macro
76 #define REG_AFEC1_CHSR (*(__I uint32_t*)0x4006401CU) /**< (AFEC1) AFEC Channel Status Reg… macro
/hal_atmel-latest/asf/sam/include/same70b/instance/
Dafec1.h44 #define REG_AFEC1_CHSR (0x4006401C) /**< (AFEC1) AFEC Channel Status Register */ macro
76 #define REG_AFEC1_CHSR (*(__I uint32_t*)0x4006401CU) /**< (AFEC1) AFEC Channel Status Reg… macro