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Searched refs:REG_ADC1_DSEQCTRL (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam0/include/same53/instance/
Dadc1.h54 #define REG_ADC1_DSEQCTRL (0x43002038) /**< \brief (ADC1) DMA Sequential Control */ macro
79 #define REG_ADC1_DSEQCTRL (*(RwReg *)0x43002038UL) /**< \brief (ADC1) DMA Sequential Cont… macro
/hal_atmel-latest/asf/sam0/include/samd51/instance/
Dadc1.h54 #define REG_ADC1_DSEQCTRL (0x43002038) /**< \brief (ADC1) DMA Sequential Control */ macro
79 #define REG_ADC1_DSEQCTRL (*(RwReg *)0x43002038UL) /**< \brief (ADC1) DMA Sequential Cont… macro
/hal_atmel-latest/asf/sam0/include/same51/instance/
Dadc1.h54 #define REG_ADC1_DSEQCTRL (0x43002038) /**< \brief (ADC1) DMA Sequential Control */ macro
79 #define REG_ADC1_DSEQCTRL (*(RwReg *)0x43002038UL) /**< \brief (ADC1) DMA Sequential Cont… macro
/hal_atmel-latest/asf/sam0/include/same54/instance/
Dadc1.h54 #define REG_ADC1_DSEQCTRL (0x43002038) /**< \brief (ADC1) DMA Sequential Control */ macro
79 #define REG_ADC1_DSEQCTRL (*(RwReg *)0x43002038UL) /**< \brief (ADC1) DMA Sequential Cont… macro