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Searched refs:RAMECC (Results 1 – 23 of 23) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samd51/
Dsamd51g19a.h733 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
862 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
864 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsamd51g18a.h733 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
862 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
864 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsamd51j18a.h763 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
900 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
902 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsamd51j19a.h763 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
900 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
902 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsamd51j20a.h763 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
900 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
902 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsamd51n20a.h795 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
937 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
939 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsamd51p19a.h795 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
937 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
939 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsamd51p20a.h795 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
937 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
939 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsamd51n19a.h795 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
937 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
939 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
/hal_atmel-latest/asf/sam0/include/same51/
Dsame51j18a.h774 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
916 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
918 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsame51j19a.h774 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
916 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
918 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsame51j20a.h774 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
916 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
918 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsame51n19a.h802 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
948 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
950 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsame51n20a.h802 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
948 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
950 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
/hal_atmel-latest/asf/sam0/include/same53/
Dsame53j18a.h769 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
910 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
912 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsame53j19a.h769 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
910 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
912 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsame53j20a.h769 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
910 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
912 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsame53n19a.h801 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
947 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
949 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsame53n20a.h801 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
947 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
949 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
/hal_atmel-latest/asf/sam0/include/same54/
Dsame54n19a.h812 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
963 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
965 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsame54n20a.h812 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
963 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
965 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsame54p19a.h812 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
963 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
965 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */
Dsame54p20a.h812 #define RAMECC (0x41020000) /**< \brief (RAMECC) APB Base Address */ macro
963 #define RAMECC ((Ramecc *)0x41020000UL) /**< \brief (RAMECC) APB Base Address */ macro
965 #define RAMECC_INSTS { RAMECC } /**< \brief (RAMECC) Instances List */