Searched refs:PWM_CMR_CPRE_MCK_DIV_32 (Results 1 – 7 of 7) sorted by relevance
558 #define PWM_CMR_CPRE_MCK_DIV_32 (0x5u << 0) /**< \brief (PWM_CMR) Master clock/32 */ macro
526 #define PWM_CMR_CPRE_MCK_DIV_32 (0x5u << 0) /**< \brief (PWM_CMR) Peripheral clock/32 */ macro
648 #define PWM_CMR_CPRE_MCK_DIV_32 (0x5u << 0) /**< \brief (PWM_CMR) Master clock/32 */ macro
96 #define PWM_CMR_CPRE_MCK_DIV_32 (PWM_CMR_CPRE_MCK_DIV_32_Val << PWM_CMR_CPRE_Pos) /**<… macro
