Searched refs:PWM_CMR_CPRE_MCK_DIV_256 (Results 1 – 7 of 7) sorted by relevance
561 #define PWM_CMR_CPRE_MCK_DIV_256 (0x8u << 0) /**< \brief (PWM_CMR) Master clock/256 */ macro
529 #define PWM_CMR_CPRE_MCK_DIV_256 (0x8u << 0) /**< \brief (PWM_CMR) Peripheral clock/256 */ macro
651 #define PWM_CMR_CPRE_MCK_DIV_256 (0x8u << 0) /**< \brief (PWM_CMR) Master clock/256 */ macro
99 #define PWM_CMR_CPRE_MCK_DIV_256 (PWM_CMR_CPRE_MCK_DIV_256_Val << PWM_CMR_CPRE_Pos) /**… macro
