Searched refs:PWM_CMR_CPRE_MCK_DIV_128 (Results 1 – 7 of 7) sorted by relevance
560 #define PWM_CMR_CPRE_MCK_DIV_128 (0x7u << 0) /**< \brief (PWM_CMR) Master clock/128 */ macro
528 #define PWM_CMR_CPRE_MCK_DIV_128 (0x7u << 0) /**< \brief (PWM_CMR) Peripheral clock/128 */ macro
650 #define PWM_CMR_CPRE_MCK_DIV_128 (0x7u << 0) /**< \brief (PWM_CMR) Master clock/128 */ macro
98 #define PWM_CMR_CPRE_MCK_DIV_128 (PWM_CMR_CPRE_MCK_DIV_128_Val << PWM_CMR_CPRE_Pos) /**… macro
