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Searched refs:PORT_PA18I_CCL_IN2 (Results 1 – 25 of 50) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20e15a.h709 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamc20e16a.h709 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamc20e17a.h709 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamc20e18a.h709 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamc20g15a.h935 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamc20g16a.h935 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamc20g17a.h935 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamc20g18a.h935 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamc20j17au.h1029 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamc20j18au.h1029 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21e15a.h749 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamc21e16a.h749 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamc21e17a.h749 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamc21e18a.h749 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
/hal_atmel-latest/asf/sam0/include/saml21/pio/
Dsaml21e15b.h723 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsaml21e16b.h723 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsaml21e17b.h723 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsaml21e18b.h723 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsaml21g16b.h988 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
/hal_atmel-latest/asf/sam0/include/samr34/pio/
Dsamr34j16b.h954 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamr34j17b.h954 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamr34j18b.h954 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
/hal_atmel-latest/asf/sam0/include/samr35/pio/
Dsamr35j16b.h941 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamr35j17b.h941 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro
Dsamr35j18b.h941 #define PORT_PA18I_CCL_IN2 (_UL_(1) << 18) macro

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