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Searched refs:PIO_MDDR_P5 (Results 1 – 7 of 7) sorted by relevance

/hal_atmel-latest/asf/sam/include/sam3x/component/
Dpio.h698 #define PIO_MDDR_P5 (0x1u << 5) /**< \brief (PIO_MDDR) Multi Drive Disable. */ macro
/hal_atmel-latest/asf/sam/include/sam4s/component/
Dpio.h718 #define PIO_MDDR_P5 (0x1u << 5) /**< \brief (PIO_MDDR) Multi-drive Disable */ macro
/hal_atmel-latest/asf/sam/include/sam4e/component/
Dpio.h720 #define PIO_MDDR_P5 (0x1u << 5) /**< \brief (PIO_MDDR) Multi Drive Disable. */ macro
/hal_atmel-latest/asf/sam/include/samv71/component/
Dpio.h2831 #define PIO_MDDR_P5 PIO_MDDR_P5_Msk /**< \de… macro
/hal_atmel-latest/asf/sam/include/samv71b/component/
Dpio.h2831 #define PIO_MDDR_P5 PIO_MDDR_P5_Msk /**< \de… macro
/hal_atmel-latest/asf/sam/include/same70/component/
Dpio.h2831 #define PIO_MDDR_P5 PIO_MDDR_P5_Msk /**< \de… macro
/hal_atmel-latest/asf/sam/include/same70b/component/
Dpio.h2831 #define PIO_MDDR_P5 PIO_MDDR_P5_Msk /**< \de… macro