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Searched refs:PIN_PB2X1_AFEC0_AD5 (Results 1 – 25 of 36) sorted by relevance

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/hal_atmel-latest/asf/sam/include/samv71/pio/
Dsamv71j19.h290 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsamv71j20.h290 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsamv71j21.h290 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsamv71n20.h290 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsamv71n21.h290 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsamv71n19.h290 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
/hal_atmel-latest/asf/sam/include/same70/pio/
Dsame70j19.h290 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsame70j20.h290 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsame70j21.h290 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsame70n20.h290 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsame70n21.h290 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsame70n19.h290 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
/hal_atmel-latest/asf/sam/include/same70b/pio/
Dsame70j19b.h284 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsame70j20b.h284 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsame70j21b.h284 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsame70n19b.h284 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsame70n20b.h284 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsame70n21b.h284 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsame70q21b.h404 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
/hal_atmel-latest/asf/sam/include/samv71b/pio/
Dsamv71j20b.h284 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsamv71j21b.h284 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsamv71j19b.h284 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsamv71n19b.h284 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsamv71n20b.h284 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro
Dsamv71n21b.h284 #define PIN_PB2X1_AFEC0_AD5 _L_(34) /**< AFEC0 signal: AD5 on PB2 mux X… macro

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