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Searched refs:PIN_PB10I_CCL_IN5 (Results 1 – 25 of 32) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20g15a.h952 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
954 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc20g16a.h952 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
954 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc20g17a.h952 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
954 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc20g18a.h952 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
954 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc20j17au.h1050 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1052 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc20j18au.h1050 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1052 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc20j15a.h1162 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1164 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc20j16a.h1162 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1164 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc20j18a.h1162 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1164 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc20j17a.h1162 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1164 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
/hal_atmel-latest/asf/sam0/include/saml21/pio/
Dsaml21g16b.h1005 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1007 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsaml21g17b.h1005 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1007 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsaml21g18b.h1005 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1007 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsaml21j16b.h1305 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1307 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsaml21j17b.h1305 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1307 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsaml21j17bu.h1305 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1307 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsaml21j18b.h1305 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1307 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsaml21j18bu.h1305 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1307 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21g15a.h1107 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1109 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc21g17a.h1107 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1109 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc21g18a.h1107 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1109 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc21g16a.h1107 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1109 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc21j17au.h1245 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1247 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc21j18au.h1245 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1247 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)
Dsamc21j15a.h1397 #define PIN_PB10I_CCL_IN5 _L_(42) /**< \brief CCL signal: IN5 on PB10 mux I */ macro
1399 #define PINMUX_PB10I_CCL_IN5 ((PIN_PB10I_CCL_IN5 << 16) | MUX_PB10I_CCL_IN5)

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