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Searched refs:PIN_PB03O_ADC0_DRV21 (Results 1 – 23 of 23) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samd51/pio/
Dsamd51g18a.h1154 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
1156 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsamd51g19a.h1154 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
1156 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsamd51j18a.h1484 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
1486 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsamd51j19a.h1484 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
1486 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsamd51j20a.h1484 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
1486 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsamd51n19a.h2110 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
2112 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsamd51n20a.h2110 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
2112 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsamd51p19a.h2392 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
2394 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsamd51p20a.h2392 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
2394 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
/hal_atmel-latest/asf/sam0/include/same51/pio/
Dsame51j19a.h1518 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
1520 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsame51j20a.h1518 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
1520 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsame51j18a.h1518 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
1520 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsame51n19a.h2144 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
2146 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsame51n20a.h2144 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
2146 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
/hal_atmel-latest/asf/sam0/include/same53/pio/
Dsame53j18a.h1537 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
1539 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsame53j19a.h1537 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
1539 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsame53j20a.h1537 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
1539 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsame53n19a.h2199 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
2201 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsame53n20a.h2199 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
2201 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
/hal_atmel-latest/asf/sam0/include/same54/pio/
Dsame54n19a.h2233 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
2235 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsame54n20a.h2233 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
2235 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsame54p20a.h2523 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
2525 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)
Dsame54p19a.h2523 #define PIN_PB03O_ADC0_DRV21 _L_(35) /**< \brief ADC0 signal: DRV21 on PB03 mux O */ macro
2525 #define PINMUX_PB03O_ADC0_DRV21 ((PIN_PB03O_ADC0_DRV21 << 16) | MUX_PB03O_ADC0_DRV21)