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Searched refs:PIN_PA04I_CCL_IN0 (Results 1 – 25 of 50) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20e15a.h686 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
688 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20e16a.h686 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
688 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20e17a.h686 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
688 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20e18a.h686 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
688 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20g15a.h908 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
910 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20g16a.h908 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
910 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20g17a.h908 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
910 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20g18a.h908 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
910 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20j17au.h998 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
1000 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20j18au.h998 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
1000 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21e15a.h726 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
728 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc21e16a.h726 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
728 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc21e17a.h726 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
728 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc21e18a.h726 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
728 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
/hal_atmel-latest/asf/sam0/include/saml21/pio/
Dsaml21e15b.h700 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
702 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsaml21e16b.h700 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
702 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsaml21e17b.h700 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
702 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsaml21e18b.h700 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
702 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsaml21g16b.h961 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
963 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
/hal_atmel-latest/asf/sam0/include/samr34/pio/
Dsamr34j16b.h923 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
925 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamr34j17b.h923 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
925 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamr34j18b.h923 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
925 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
/hal_atmel-latest/asf/sam0/include/samr35/pio/
Dsamr35j16b.h910 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
912 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamr35j17b.h910 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
912 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamr35j18b.h910 #define PIN_PA04I_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux I */ macro
912 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)

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