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Searched refs:MUX_PB22H_GCLK_IO0 (Results 1 – 25 of 60) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samd20/pio/
Dsamd20g14.h111 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
112 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamd20g15.h111 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
112 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamd20g16.h111 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
112 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamd20g18.h111 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
112 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamd20g17.h111 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
112 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamd20j14.h143 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
144 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamd20j15.h143 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
144 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamd20j16.h143 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
144 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/samr21/pio/
Dsamr21e19a.h112 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
113 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamr21g16a.h124 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
125 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamr21g17a.h124 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
125 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamr21g18a.h124 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
125 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/samd21/pio/
Dsamd21g15a.h110 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
111 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamd21g16a.h110 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
111 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamd21g17a.h110 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
111 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamd21g18a.h110 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
111 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/samr34/pio/
Dsamr34j16b.h149 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
150 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamr34j17b.h149 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
150 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamr34j18b.h149 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
150 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20g15a.h176 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
177 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamc20g16a.h176 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
177 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamc20g17a.h176 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
177 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamc20g18a.h176 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
177 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamc20j17au.h192 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
193 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)
Dsamc20j18au.h192 #define MUX_PB22H_GCLK_IO0 _L_(7) macro
193 #define PINMUX_PB22H_GCLK_IO0 ((PIN_PB22H_GCLK_IO0 << 16) | MUX_PB22H_GCLK_IO0)

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