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Searched refs:MUX_PB16H_GCLK_IO2 (Results 1 – 25 of 39) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samr21/pio/
Dsamr21e16a.h128 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
129 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamr21e17a.h128 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
129 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamr21e18a.h128 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
129 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamr21e19a.h144 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
145 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamr21g16a.h160 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
161 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamr21g17a.h160 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
161 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamr21g18a.h160 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
161 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
/hal_atmel-latest/asf/sam0/include/samr34/pio/
Dsamr34j16b.h181 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
182 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamr34j17b.h181 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
182 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamr34j18b.h181 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
182 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
/hal_atmel-latest/asf/sam0/include/samd20/pio/
Dsamd20j14.h175 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
176 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamd20j15.h175 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
176 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamd20j16.h175 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
176 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamd20j17.h175 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
176 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamd20j18.h175 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
176 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
/hal_atmel-latest/asf/sam0/include/samr35/pio/
Dsamr35j16b.h181 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
182 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamr35j17b.h181 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
182 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamr35j18b.h181 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
182 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
/hal_atmel-latest/asf/sam0/include/samd21/pio/
Dsamd21j15a.h174 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
175 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamd21j18a.h174 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
175 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamd21j16a.h174 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
175 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamd21j17a.h174 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
175 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20j15a.h240 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
241 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamc20j16a.h240 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
241 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)
Dsamc20j18a.h240 #define MUX_PB16H_GCLK_IO2 _L_(7) macro
241 #define PINMUX_PB16H_GCLK_IO2 ((PIN_PB16H_GCLK_IO2 << 16) | MUX_PB16H_GCLK_IO2)

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