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Searched refs:MUX_PB14H_GCLK_IO0 (Results 1 – 25 of 37) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samr21/pio/
Dsamr21e16a.h96 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
97 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamr21e17a.h96 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
97 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamr21e18a.h96 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
97 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamr21e19a.h108 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
109 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamr21g16a.h120 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
121 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamr21g17a.h120 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
121 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamr21g18a.h120 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
121 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20j17au.h188 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
189 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamc20j18au.h188 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
189 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamc20j15a.h204 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
205 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamc20j16a.h204 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
205 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamc20j18a.h204 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
205 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamc20j17a.h204 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
205 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/samd20/pio/
Dsamd20j14.h139 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
140 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamd20j15.h139 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
140 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamd20j16.h139 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
140 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamd20j17.h139 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
140 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamd20j18.h139 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
140 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/samd21/pio/
Dsamd21j15a.h138 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
139 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamd21j18a.h138 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
139 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamd21j16a.h138 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
139 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamd21j17a.h138 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
139 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21j17au.h188 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
189 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
Dsamc21j18au.h188 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
189 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/saml21/pio/
Dsaml21j16b.h187 #define MUX_PB14H_GCLK_IO0 _L_(7) macro
188 #define PINMUX_PB14H_GCLK_IO0 ((PIN_PB14H_GCLK_IO0 << 16) | MUX_PB14H_GCLK_IO0)

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