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Searched refs:MUX_PB11H_GCLK_IO5 (Results 1 – 25 of 50) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samd20/pio/
Dsamd20g14.h167 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
168 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamd20g15.h167 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
168 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamd20g16.h167 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
168 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamd20g18.h167 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
168 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamd20g17.h167 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
168 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamd20j14.h211 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
212 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamd20j15.h211 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
212 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamd20j16.h211 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
212 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamd20j17.h211 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
212 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamd20j18.h211 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
212 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
/hal_atmel-latest/asf/sam0/include/samd21/pio/
Dsamd21g15a.h166 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
167 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamd21g16a.h166 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
167 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamd21g17a.h166 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
167 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamd21g18a.h166 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
167 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20g15a.h232 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
233 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamc20g16a.h232 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
233 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamc20g17a.h232 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
233 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamc20g18a.h232 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
233 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamc20j17au.h252 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
253 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamc20j18au.h252 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
253 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
/hal_atmel-latest/asf/sam0/include/saml21/pio/
Dsaml21g16b.h203 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
204 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsaml21g17b.h203 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
204 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsaml21g18b.h203 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
204 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21g15a.h232 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
233 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)
Dsamc21g17a.h232 #define MUX_PB11H_GCLK_IO5 _L_(7) macro
233 #define PINMUX_PB11H_GCLK_IO5 ((PIN_PB11H_GCLK_IO5 << 16) | MUX_PB11H_GCLK_IO5)

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