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Searched refs:MUX_PB10H_GCLK_IO4 (Results 1 – 25 of 50) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samd20/pio/
Dsamd20g14.h155 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
156 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamd20g15.h155 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
156 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamd20g16.h155 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
156 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamd20g18.h155 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
156 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamd20g17.h155 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
156 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamd20j14.h199 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
200 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamd20j15.h199 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
200 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamd20j16.h199 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
200 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamd20j17.h199 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
200 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamd20j18.h199 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
200 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
/hal_atmel-latest/asf/sam0/include/samd21/pio/
Dsamd21g15a.h154 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
155 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamd21g16a.h154 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
155 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamd21g17a.h154 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
155 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamd21g18a.h154 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
155 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20g15a.h220 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
221 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamc20g16a.h220 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
221 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamc20g17a.h220 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
221 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamc20g18a.h220 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
221 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamc20j17au.h240 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
241 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamc20j18au.h240 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
241 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
/hal_atmel-latest/asf/sam0/include/saml21/pio/
Dsaml21g16b.h191 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
192 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsaml21g17b.h191 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
192 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsaml21g18b.h191 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
192 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21g15a.h220 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
221 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)
Dsamc21g17a.h220 #define MUX_PB10H_GCLK_IO4 _L_(7) macro
221 #define PINMUX_PB10H_GCLK_IO4 ((PIN_PB10H_GCLK_IO4 << 16) | MUX_PB10H_GCLK_IO4)

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