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Searched refs:MUX_PB10E_TC1_WO0 (Results 1 – 25 of 28) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20g15a.h743 #define MUX_PB10E_TC1_WO0 _L_(4) macro
744 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc20g16a.h743 #define MUX_PB10E_TC1_WO0 _L_(4) macro
744 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc20g17a.h743 #define MUX_PB10E_TC1_WO0 _L_(4) macro
744 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc20g18a.h743 #define MUX_PB10E_TC1_WO0 _L_(4) macro
744 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc20j17au.h817 #define MUX_PB10E_TC1_WO0 _L_(4) macro
818 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc20j18au.h817 #define MUX_PB10E_TC1_WO0 _L_(4) macro
818 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc20j15a.h905 #define MUX_PB10E_TC1_WO0 _L_(4) macro
906 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc20j16a.h905 #define MUX_PB10E_TC1_WO0 _L_(4) macro
906 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc20j18a.h905 #define MUX_PB10E_TC1_WO0 _L_(4) macro
906 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc20j17a.h905 #define MUX_PB10E_TC1_WO0 _L_(4) macro
906 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
/hal_atmel-latest/asf/sam0/include/saml21/pio/
Dsaml21g16b.h755 #define MUX_PB10E_TC1_WO0 _L_(4) macro
756 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsaml21g17b.h755 #define MUX_PB10E_TC1_WO0 _L_(4) macro
756 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsaml21g18b.h755 #define MUX_PB10E_TC1_WO0 _L_(4) macro
756 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsaml21j16b.h941 #define MUX_PB10E_TC1_WO0 _L_(4) macro
942 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsaml21j17b.h941 #define MUX_PB10E_TC1_WO0 _L_(4) macro
942 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsaml21j17bu.h941 #define MUX_PB10E_TC1_WO0 _L_(4) macro
942 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsaml21j18b.h941 #define MUX_PB10E_TC1_WO0 _L_(4) macro
942 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsaml21j18bu.h941 #define MUX_PB10E_TC1_WO0 _L_(4) macro
942 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21g15a.h843 #define MUX_PB10E_TC1_WO0 _L_(4) macro
844 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc21g17a.h843 #define MUX_PB10E_TC1_WO0 _L_(4) macro
844 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc21g18a.h843 #define MUX_PB10E_TC1_WO0 _L_(4) macro
844 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc21g16a.h843 #define MUX_PB10E_TC1_WO0 _L_(4) macro
844 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc21j17au.h949 #define MUX_PB10E_TC1_WO0 _L_(4) macro
950 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc21j18au.h949 #define MUX_PB10E_TC1_WO0 _L_(4) macro
950 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)
Dsamc21j15a.h1053 #define MUX_PB10E_TC1_WO0 _L_(4) macro
1054 #define PINMUX_PB10E_TC1_WO0 ((PIN_PB10E_TC1_WO0 << 16) | MUX_PB10E_TC1_WO0)

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