Home
last modified time | relevance | path

Searched refs:MUX_PB09O_ADC0_DRV2 (Results 1 – 23 of 23) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samd51/pio/
Dsamd51g18a.h1079 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
1080 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsamd51g19a.h1079 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
1080 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsamd51j18a.h1409 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
1410 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsamd51j19a.h1409 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
1410 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsamd51j20a.h1409 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
1410 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsamd51n19a.h2035 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
2036 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsamd51n20a.h2035 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
2036 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsamd51p19a.h2317 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
2318 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsamd51p20a.h2317 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
2318 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
/hal_atmel-latest/asf/sam0/include/same51/pio/
Dsame51j19a.h1443 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
1444 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsame51j20a.h1443 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
1444 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsame51j18a.h1443 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
1444 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsame51n19a.h2069 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
2070 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsame51n20a.h2069 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
2070 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
/hal_atmel-latest/asf/sam0/include/same53/pio/
Dsame53j18a.h1462 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
1463 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsame53j19a.h1462 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
1463 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsame53j20a.h1462 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
1463 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsame53n19a.h2124 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
2125 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsame53n20a.h2124 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
2125 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
/hal_atmel-latest/asf/sam0/include/same54/pio/
Dsame54n19a.h2158 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
2159 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsame54n20a.h2158 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
2159 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsame54p20a.h2448 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
2449 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)
Dsame54p19a.h2448 #define MUX_PB09O_ADC0_DRV2 _L_(14) macro
2449 #define PINMUX_PB09O_ADC0_DRV2 ((PIN_PB09O_ADC0_DRV2 << 16) | MUX_PB09O_ADC0_DRV2)