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Searched refs:MUX_PB08O_ADC0_DRV1 (Results 1 – 23 of 23) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samd51/pio/
Dsamd51g18a.h1075 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
1076 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsamd51g19a.h1075 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
1076 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsamd51j18a.h1405 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
1406 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsamd51j19a.h1405 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
1406 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsamd51j20a.h1405 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
1406 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsamd51n19a.h2031 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
2032 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsamd51n20a.h2031 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
2032 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsamd51p19a.h2313 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
2314 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsamd51p20a.h2313 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
2314 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
/hal_atmel-latest/asf/sam0/include/same51/pio/
Dsame51j19a.h1439 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
1440 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsame51j20a.h1439 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
1440 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsame51j18a.h1439 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
1440 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsame51n19a.h2065 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
2066 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsame51n20a.h2065 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
2066 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
/hal_atmel-latest/asf/sam0/include/same53/pio/
Dsame53j18a.h1458 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
1459 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsame53j19a.h1458 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
1459 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsame53j20a.h1458 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
1459 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsame53n19a.h2120 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
2121 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsame53n20a.h2120 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
2121 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
/hal_atmel-latest/asf/sam0/include/same54/pio/
Dsame54n19a.h2154 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
2155 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsame54n20a.h2154 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
2155 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsame54p20a.h2444 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
2445 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)
Dsame54p19a.h2444 #define MUX_PB08O_ADC0_DRV1 _L_(14) macro
2445 #define PINMUX_PB08O_ADC0_DRV1 ((PIN_PB08O_ADC0_DRV1 << 16) | MUX_PB08O_ADC0_DRV1)