Home
last modified time | relevance | path

Searched refs:MUX_PB02O_ADC0_DRV20 (Results 1 – 23 of 23) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samd51/pio/
Dsamd51g18a.h1151 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
1152 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsamd51g19a.h1151 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
1152 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsamd51j18a.h1481 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
1482 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsamd51j19a.h1481 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
1482 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsamd51j20a.h1481 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
1482 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsamd51n19a.h2107 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
2108 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsamd51n20a.h2107 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
2108 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsamd51p19a.h2389 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
2390 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsamd51p20a.h2389 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
2390 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
/hal_atmel-latest/asf/sam0/include/same51/pio/
Dsame51j19a.h1515 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
1516 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsame51j20a.h1515 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
1516 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsame51j18a.h1515 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
1516 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsame51n19a.h2141 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
2142 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsame51n20a.h2141 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
2142 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
/hal_atmel-latest/asf/sam0/include/same53/pio/
Dsame53j18a.h1534 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
1535 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsame53j19a.h1534 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
1535 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsame53j20a.h1534 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
1535 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsame53n19a.h2196 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
2197 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsame53n20a.h2196 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
2197 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
/hal_atmel-latest/asf/sam0/include/same54/pio/
Dsame54n19a.h2230 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
2231 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsame54n20a.h2230 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
2231 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsame54p20a.h2520 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
2521 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)
Dsame54p19a.h2520 #define MUX_PB02O_ADC0_DRV20 _L_(14) macro
2521 #define PINMUX_PB02O_ADC0_DRV20 ((PIN_PB02O_ADC0_DRV20 << 16) | MUX_PB02O_ADC0_DRV20)