Home
last modified time | relevance | path

Searched refs:MUX_PB00I_CCL_IN1 (Results 1 – 25 of 27) sorted by relevance

12

/hal_atmel-latest/asf/sam0/include/samr34/pio/
Dsamr34j16b.h944 #define MUX_PB00I_CCL_IN1 _L_(8) macro
945 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamr34j17b.h944 #define MUX_PB00I_CCL_IN1 _L_(8) macro
945 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamr34j18b.h944 #define MUX_PB00I_CCL_IN1 _L_(8) macro
945 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20j17au.h1019 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1020 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamc20j18au.h1019 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1020 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamc20j15a.h1131 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1132 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamc20j16a.h1131 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1132 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamc20j18a.h1131 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1132 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamc20j17a.h1131 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1132 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
/hal_atmel-latest/asf/sam0/include/samr35/pio/
Dsamr35j16b.h931 #define MUX_PB00I_CCL_IN1 _L_(8) macro
932 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamr35j17b.h931 #define MUX_PB00I_CCL_IN1 _L_(8) macro
932 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamr35j18b.h931 #define MUX_PB00I_CCL_IN1 _L_(8) macro
932 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21j17au.h1214 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1215 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamc21j18au.h1214 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1215 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamc21j15a.h1366 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1367 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamc21j17a.h1366 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1367 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamc21j18a.h1366 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1367 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamc21j16a.h1366 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1367 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
/hal_atmel-latest/asf/sam0/include/saml21/pio/
Dsaml21j16b.h1274 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1275 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsaml21j17b.h1274 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1275 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsaml21j17bu.h1274 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1275 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsaml21j18b.h1274 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1275 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsaml21j18bu.h1274 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1275 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
/hal_atmel-latest/asf/sam0/include/samc20n/pio/
Dsamc20n17a.h1510 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1511 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)
Dsamc20n18a.h1510 #define MUX_PB00I_CCL_IN1 _L_(8) macro
1511 #define PINMUX_PB00I_CCL_IN1 ((PIN_PB00I_CCL_IN1 << 16) | MUX_PB00I_CCL_IN1)

12