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Searched refs:MUX_PA27O_ADC0_DRV18 (Results 1 – 23 of 23) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samd51/pio/
Dsamd51g18a.h1143 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
1144 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsamd51g19a.h1143 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
1144 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsamd51j18a.h1473 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
1474 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsamd51j19a.h1473 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
1474 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsamd51j20a.h1473 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
1474 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsamd51n19a.h2099 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
2100 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsamd51n20a.h2099 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
2100 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsamd51p19a.h2381 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
2382 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsamd51p20a.h2381 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
2382 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
/hal_atmel-latest/asf/sam0/include/same51/pio/
Dsame51j19a.h1507 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
1508 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsame51j20a.h1507 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
1508 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsame51j18a.h1507 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
1508 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsame51n19a.h2133 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
2134 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsame51n20a.h2133 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
2134 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
/hal_atmel-latest/asf/sam0/include/same53/pio/
Dsame53j18a.h1526 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
1527 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsame53j19a.h1526 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
1527 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsame53j20a.h1526 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
1527 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsame53n19a.h2188 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
2189 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsame53n20a.h2188 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
2189 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
/hal_atmel-latest/asf/sam0/include/same54/pio/
Dsame54n19a.h2222 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
2223 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsame54n20a.h2222 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
2223 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsame54p20a.h2512 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
2513 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)
Dsame54p19a.h2512 #define MUX_PA27O_ADC0_DRV18 _L_(14) macro
2513 #define PINMUX_PA27O_ADC0_DRV18 ((PIN_PA27O_ADC0_DRV18 << 16) | MUX_PA27O_ADC0_DRV18)