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Searched refs:MUX_PA14H_GCLK_IO0 (Results 1 – 25 of 88) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samd20/pio/
Dsamd20e14.h87 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
88 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd20e15.h87 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
88 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd20e16.h87 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
88 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd20e17.h87 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
88 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd20e18.h87 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
88 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd20g18u.h105 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
106 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd20g17u.h105 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
106 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd20g14.h115 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
116 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd20g15.h115 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
116 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd20g16.h115 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
116 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd20g18.h115 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
116 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/samd21/pio/
Dsamd21e15a.h86 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
87 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd21e16a.h86 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
87 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd21e17a.h86 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
87 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamd21e18a.h86 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
87 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20e15a.h144 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
145 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamc20e16a.h144 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
145 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamc20e17a.h144 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
145 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamc20e18a.h144 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
145 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/samr21/pio/
Dsamr21e16a.h100 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
101 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamr21e17a.h100 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
101 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamr21e18a.h100 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
101 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21e15a.h144 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
145 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamc21e16a.h144 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
145 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)
Dsamc21e17a.h144 #define MUX_PA14H_GCLK_IO0 _L_(7) macro
145 #define PINMUX_PA14H_GCLK_IO0 ((PIN_PA14H_GCLK_IO0 << 16) | MUX_PA14H_GCLK_IO0)

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