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Searched refs:MUX_PA10O_ADC0_DRV8 (Results 1 – 23 of 23) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samd51/pio/
Dsamd51g18a.h1103 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
1104 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsamd51g19a.h1103 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
1104 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsamd51j18a.h1433 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
1434 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsamd51j19a.h1433 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
1434 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsamd51j20a.h1433 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
1434 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsamd51n19a.h2059 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
2060 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsamd51n20a.h2059 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
2060 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsamd51p19a.h2341 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
2342 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsamd51p20a.h2341 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
2342 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
/hal_atmel-latest/asf/sam0/include/same51/pio/
Dsame51j19a.h1467 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
1468 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsame51j20a.h1467 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
1468 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsame51j18a.h1467 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
1468 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsame51n19a.h2093 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
2094 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsame51n20a.h2093 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
2094 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
/hal_atmel-latest/asf/sam0/include/same53/pio/
Dsame53j18a.h1486 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
1487 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsame53j19a.h1486 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
1487 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsame53j20a.h1486 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
1487 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsame53n19a.h2148 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
2149 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsame53n20a.h2148 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
2149 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
/hal_atmel-latest/asf/sam0/include/same54/pio/
Dsame54n19a.h2182 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
2183 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsame54n20a.h2182 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
2183 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsame54p20a.h2472 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
2473 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)
Dsame54p19a.h2472 #define MUX_PA10O_ADC0_DRV8 _L_(14) macro
2473 #define PINMUX_PA10O_ADC0_DRV8 ((PIN_PA10O_ADC0_DRV8 << 16) | MUX_PA10O_ADC0_DRV8)