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Searched refs:MUX_PA10E_TCC1_WO0 (Results 1 – 25 of 67) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samd21/pio/
Dsamd21e15a.h459 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
460 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamd21e16a.h459 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
460 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamd21e17a.h459 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
460 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamd21e18a.h459 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
460 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamd21g17au.h620 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
621 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamd21g18au.h620 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
621 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamd21g15a.h681 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
682 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamd21g16a.h681 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
682 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamd21g17a.h681 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
682 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
/hal_atmel-latest/asf/sam0/include/samr21/pio/
Dsamr21e18a.h549 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
550 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamr21e16a.h549 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
550 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamr21e17a.h549 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
550 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamr21e19a.h639 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
640 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20e15a.h504 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
505 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamc20e16a.h504 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
505 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamc20e17a.h504 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
505 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamc20e18a.h504 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
505 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21e15a.h513 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
514 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamc21e16a.h513 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
514 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamc21e18a.h513 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
514 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsamc21e17a.h513 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
514 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
/hal_atmel-latest/asf/sam0/include/saml21/pio/
Dsaml21e15b.h491 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
492 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsaml21e16b.h491 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
492 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsaml21e17b.h491 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
492 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)
Dsaml21e18b.h491 #define MUX_PA10E_TCC1_WO0 _L_(4) macro
492 #define PINMUX_PA10E_TCC1_WO0 ((PIN_PA10E_TCC1_WO0 << 16) | MUX_PA10E_TCC1_WO0)

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