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Searched refs:MUX_PA07E_TCC1_WO1 (Results 1 – 25 of 67) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samd21/pio/
Dsamd21e15a.h467 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
468 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamd21e16a.h467 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
468 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamd21e17a.h467 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
468 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamd21e18a.h467 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
468 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamd21g17au.h628 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
629 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamd21g18au.h628 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
629 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamd21g15a.h689 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
690 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamd21g16a.h689 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
690 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamd21g17a.h689 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
690 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20e15a.h512 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
513 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamc20e16a.h512 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
513 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamc20e17a.h512 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
513 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamc20e18a.h512 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
513 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
/hal_atmel-latest/asf/sam0/include/samr21/pio/
Dsamr21e16a.h557 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
558 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamr21e17a.h557 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
558 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamr21e18a.h557 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
558 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamr21e19a.h647 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
648 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21e15a.h521 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
522 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamc21e16a.h521 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
522 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamc21e17a.h521 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
522 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsamc21e18a.h521 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
522 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
/hal_atmel-latest/asf/sam0/include/saml21/pio/
Dsaml21e15b.h499 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
500 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsaml21e16b.h499 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
500 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsaml21e17b.h499 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
500 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)
Dsaml21e18b.h499 #define MUX_PA07E_TCC1_WO1 _L_(4) macro
500 #define PINMUX_PA07E_TCC1_WO1 ((PIN_PA07E_TCC1_WO1 << 16) | MUX_PA07E_TCC1_WO1)

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