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Searched refs:MUX_PA05A_EIC_EXTINT5 (Results 1 – 25 of 107) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samd20/pio/
Dsamd20e14.h177 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
178 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd20e16.h177 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
178 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd20e17.h177 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
178 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd20e18.h177 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
178 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd20e15.h177 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
178 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd20g18u.h223 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
224 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd20g17u.h223 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
224 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd20g14.h240 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
241 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd20g15.h240 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
241 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd20g16.h240 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
241 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd20g17.h240 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
241 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd20g18.h240 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
241 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
/hal_atmel-latest/asf/sam0/include/samd21/pio/
Dsamd21e15a.h176 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
177 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd21e16a.h176 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
177 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd21e17a.h176 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
177 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamd21e18a.h176 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
177 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20e15a.h234 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
235 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamc20e16a.h234 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
235 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamc20e17a.h234 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
235 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamc20e18a.h234 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
235 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21e15a.h234 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
235 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamc21e16a.h234 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
235 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamc21e18a.h234 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
235 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
Dsamc21e17a.h234 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
235 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
/hal_atmel-latest/asf/sam0/include/saml21/pio/
Dsaml21e15b.h204 #define MUX_PA05A_EIC_EXTINT5 _L_(0) macro
205 #define PINMUX_PA05A_EIC_EXTINT5 ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)

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