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Searched refs:MUX_PA04O_ADC0_DRV3 (Results 1 – 23 of 23) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samd51/pio/
Dsamd51g18a.h1083 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
1084 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsamd51g19a.h1083 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
1084 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsamd51j18a.h1413 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
1414 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsamd51j19a.h1413 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
1414 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsamd51j20a.h1413 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
1414 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsamd51n19a.h2039 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
2040 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsamd51n20a.h2039 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
2040 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsamd51p19a.h2321 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
2322 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsamd51p20a.h2321 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
2322 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
/hal_atmel-latest/asf/sam0/include/same51/pio/
Dsame51j19a.h1447 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
1448 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsame51j20a.h1447 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
1448 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsame51j18a.h1447 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
1448 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsame51n19a.h2073 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
2074 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsame51n20a.h2073 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
2074 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
/hal_atmel-latest/asf/sam0/include/same53/pio/
Dsame53j18a.h1466 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
1467 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsame53j19a.h1466 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
1467 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsame53j20a.h1466 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
1467 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsame53n19a.h2128 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
2129 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsame53n20a.h2128 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
2129 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
/hal_atmel-latest/asf/sam0/include/same54/pio/
Dsame54n19a.h2162 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
2163 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsame54n20a.h2162 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
2163 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsame54p20a.h2452 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
2453 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)
Dsame54p19a.h2452 #define MUX_PA04O_ADC0_DRV3 _L_(14) macro
2453 #define PINMUX_PA04O_ADC0_DRV3 ((PIN_PA04O_ADC0_DRV3 << 16) | MUX_PA04O_ADC0_DRV3)