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Searched refs:MUX_PA04I_CCL_IN0 (Results 1 – 25 of 50) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samc20/pio/
Dsamc20e15a.h687 #define MUX_PA04I_CCL_IN0 _L_(8) macro
688 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20e16a.h687 #define MUX_PA04I_CCL_IN0 _L_(8) macro
688 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20e17a.h687 #define MUX_PA04I_CCL_IN0 _L_(8) macro
688 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20e18a.h687 #define MUX_PA04I_CCL_IN0 _L_(8) macro
688 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20g15a.h909 #define MUX_PA04I_CCL_IN0 _L_(8) macro
910 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20g16a.h909 #define MUX_PA04I_CCL_IN0 _L_(8) macro
910 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20g17a.h909 #define MUX_PA04I_CCL_IN0 _L_(8) macro
910 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20g18a.h909 #define MUX_PA04I_CCL_IN0 _L_(8) macro
910 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20j17au.h999 #define MUX_PA04I_CCL_IN0 _L_(8) macro
1000 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc20j18au.h999 #define MUX_PA04I_CCL_IN0 _L_(8) macro
1000 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
/hal_atmel-latest/asf/sam0/include/samc21/pio/
Dsamc21e15a.h727 #define MUX_PA04I_CCL_IN0 _L_(8) macro
728 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc21e16a.h727 #define MUX_PA04I_CCL_IN0 _L_(8) macro
728 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc21e17a.h727 #define MUX_PA04I_CCL_IN0 _L_(8) macro
728 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamc21e18a.h727 #define MUX_PA04I_CCL_IN0 _L_(8) macro
728 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
/hal_atmel-latest/asf/sam0/include/saml21/pio/
Dsaml21e15b.h701 #define MUX_PA04I_CCL_IN0 _L_(8) macro
702 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsaml21e16b.h701 #define MUX_PA04I_CCL_IN0 _L_(8) macro
702 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsaml21e17b.h701 #define MUX_PA04I_CCL_IN0 _L_(8) macro
702 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsaml21e18b.h701 #define MUX_PA04I_CCL_IN0 _L_(8) macro
702 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsaml21g16b.h962 #define MUX_PA04I_CCL_IN0 _L_(8) macro
963 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
/hal_atmel-latest/asf/sam0/include/samr34/pio/
Dsamr34j16b.h924 #define MUX_PA04I_CCL_IN0 _L_(8) macro
925 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamr34j17b.h924 #define MUX_PA04I_CCL_IN0 _L_(8) macro
925 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamr34j18b.h924 #define MUX_PA04I_CCL_IN0 _L_(8) macro
925 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
/hal_atmel-latest/asf/sam0/include/samr35/pio/
Dsamr35j16b.h911 #define MUX_PA04I_CCL_IN0 _L_(8) macro
912 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamr35j17b.h911 #define MUX_PA04I_CCL_IN0 _L_(8) macro
912 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)
Dsamr35j18b.h911 #define MUX_PA04I_CCL_IN0 _L_(8) macro
912 #define PINMUX_PA04I_CCL_IN0 ((PIN_PA04I_CCL_IN0 << 16) | MUX_PA04I_CCL_IN0)

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