Home
last modified time | relevance | path

Searched refs:ID_CMCC (Results 1 – 23 of 23) sorted by relevance

/hal_atmel-latest/asf/sam0/include/samd51/
Dsamd51g19a.h656 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsamd51g18a.h656 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsamd51j18a.h680 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsamd51j19a.h680 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsamd51j20a.h680 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsamd51n20a.h707 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsamd51p19a.h707 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsamd51p20a.h707 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsamd51n19a.h707 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
/hal_atmel-latest/asf/sam0/include/same51/
Dsame51j18a.h687 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsame51j19a.h687 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsame51j20a.h687 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsame51n19a.h711 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsame51n20a.h711 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
/hal_atmel-latest/asf/sam0/include/same53/
Dsame53j18a.h684 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsame53j19a.h684 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsame53j20a.h684 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsame53n19a.h711 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsame53n20a.h711 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
/hal_atmel-latest/asf/sam0/include/same54/
Dsame54n19a.h718 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsame54n20a.h718 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsame54p19a.h718 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro
Dsame54p20a.h718 #define ID_CMCC 35 /**< \brief Cortex M Cache Controller (CMCC) */ macro