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Searched refs:CMCC_SR_CSTS_Pos (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-latest/asf/sam0/include/same51/component/
Dcmcc.h185 #define CMCC_SR_CSTS_Pos 0 /**< \brief (CMCC_SR) Cache Controller Status */ macro
186 #define CMCC_SR_CSTS (_U_(0x1) << CMCC_SR_CSTS_Pos)
/hal_atmel-latest/asf/sam0/include/samd51/component/
Dcmcc.h185 #define CMCC_SR_CSTS_Pos 0 /**< \brief (CMCC_SR) Cache Controller Status */ macro
186 #define CMCC_SR_CSTS (_U_(0x1) << CMCC_SR_CSTS_Pos)
/hal_atmel-latest/asf/sam0/include/same53/component/
Dcmcc.h185 #define CMCC_SR_CSTS_Pos 0 /**< \brief (CMCC_SR) Cache Controller Status */ macro
186 #define CMCC_SR_CSTS (_U_(0x1) << CMCC_SR_CSTS_Pos)
/hal_atmel-latest/asf/sam0/include/same54/component/
Dcmcc.h185 #define CMCC_SR_CSTS_Pos 0 /**< \brief (CMCC_SR) Cache Controller Status */ macro
186 #define CMCC_SR_CSTS (_U_(0x1) << CMCC_SR_CSTS_Pos)