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Searched refs:CMCC (Results 1 – 25 of 33) sorted by relevance

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/hal_atmel-latest/asf/sam/include/sam4s/
Dsam4sa16b.h363 #define CMCC (0x4007C000U) /**< \brief (CMCC ) Base Address */ macro
406 #define CMCC ((Cmcc *)0x4007C000U) /**< \brief (CMCC ) Base Address */ macro
Dsam4sa16c.h381 #define CMCC (0x4007C000U) /**< \brief (CMCC ) Base Address */ macro
427 #define CMCC ((Cmcc *)0x4007C000U) /**< \brief (CMCC ) Base Address */ macro
Dsam4sd16b.h367 #define CMCC (0x4007C000U) /**< \brief (CMCC ) Base Address */ macro
411 #define CMCC ((Cmcc *)0x4007C000U) /**< \brief (CMCC ) Base Address */ macro
Dsam4sd32b.h367 #define CMCC (0x4007C000U) /**< \brief (CMCC ) Base Address */ macro
411 #define CMCC ((Cmcc *)0x4007C000U) /**< \brief (CMCC ) Base Address */ macro
Dsam4sd16c.h385 #define CMCC (0x4007C000U) /**< \brief (CMCC ) Base Address */ macro
432 #define CMCC ((Cmcc *)0x4007C000U) /**< \brief (CMCC ) Base Address */ macro
Dsam4sd32c.h385 #define CMCC (0x4007C000U) /**< \brief (CMCC ) Base Address */ macro
432 #define CMCC ((Cmcc *)0x4007C000U) /**< \brief (CMCC ) Base Address */ macro
/hal_atmel-latest/asf/sam/include/sam4e/
Dsam4e16e.h450 #define CMCC (0x400C4000U) /**< \brief (CMCC ) Base Address */ macro
506 #define CMCC ((Cmcc *)0x400C4000U) /**< \brief (CMCC ) Base Address */ macro
Dsam4e8e.h450 #define CMCC (0x400C4000U) /**< \brief (CMCC ) Base Address */ macro
506 #define CMCC ((Cmcc *)0x400C4000U) /**< \brief (CMCC ) Base Address */ macro
Dsam4e16c.h446 #define CMCC (0x400C4000U) /**< \brief (CMCC ) Base Address */ macro
501 #define CMCC ((Cmcc *)0x400C4000U) /**< \brief (CMCC ) Base Address */ macro
Dsam4e8c.h446 #define CMCC (0x400C4000U) /**< \brief (CMCC ) Base Address */ macro
501 #define CMCC ((Cmcc *)0x400C4000U) /**< \brief (CMCC ) Base Address */ macro
/hal_atmel-latest/asf/sam0/include/samd51/
Dsamd51g19a.h706 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
772 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
775 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
Dsamd51g18a.h706 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
772 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
775 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
Dsamd51j18a.h735 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
806 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
809 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
Dsamd51j19a.h735 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
806 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
809 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
Dsamd51j20a.h735 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
806 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
809 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
Dsamd51n20a.h767 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
843 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
846 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
Dsamd51p19a.h767 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
843 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
846 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
Dsamd51p20a.h767 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
843 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
846 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
Dsamd51n19a.h767 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
843 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
846 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
/hal_atmel-latest/asf/sam0/include/same51/
Dsame51j18a.h746 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
822 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
825 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
Dsame51j19a.h746 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
822 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
825 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
Dsame51j20a.h746 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
822 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
825 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
/hal_atmel-latest/asf/sam0/include/same53/
Dsame53j18a.h740 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
812 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
815 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
Dsame53j19a.h740 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
812 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
815 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */
Dsame53j20a.h740 #define CMCC (0x41006000) /**< \brief (CMCC) APB Base Address */ macro
812 #define CMCC ((Cmcc *)0x41006000UL) /**< \brief (CMCC) APB Base Address */ macro
815 #define CMCC_INSTS { CMCC } /**< \brief (CMCC) Instances List */

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