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Searched refs:CCL (Results 1 – 25 of 73) sorted by relevance

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/hal_atmel-latest/asf/sam0/include/samc20/
Dsamc20e15a.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20e16a.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20e17a.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20e18a.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20j18a.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20j18au.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20g15a.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20g16a.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20g17a.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20g18a.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20j15a.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20j16a.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20j17a.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc20j17au.h377 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
425 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
427 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
/hal_atmel-latest/asf/sam0/include/samr34/
Dsamr34j17b.h395 #define CCL (0x43001C00) /**< \brief (CCL) APB Base Address */ macro
454 #define CCL ((Ccl *)0x43001C00UL) /**< \brief (CCL) APB Base Address */ macro
456 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamr34j16b.h395 #define CCL (0x43001C00) /**< \brief (CCL) APB Base Address */ macro
454 #define CCL ((Ccl *)0x43001C00UL) /**< \brief (CCL) APB Base Address */ macro
456 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamr34j18b.h395 #define CCL (0x43001C00) /**< \brief (CCL) APB Base Address */ macro
454 #define CCL ((Ccl *)0x43001C00UL) /**< \brief (CCL) APB Base Address */ macro
456 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
/hal_atmel-latest/asf/sam0/include/samc21/
Dsamc21e15a.h403 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
459 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
461 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc21e16a.h403 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
459 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
461 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc21e17a.h403 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
459 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
461 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsamc21e18a.h403 #define CCL (0x42005C00) /**< \brief (CCL) APB Base Address */ macro
459 #define CCL ((Ccl *)0x42005C00UL) /**< \brief (CCL) APB Base Address */ macro
461 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
/hal_atmel-latest/asf/sam0/include/saml21/
Dsaml21e18b.h390 #define CCL (0x43001C00) /**< \brief (CCL) APB Base Address */ macro
448 #define CCL ((Ccl *)0x43001C00UL) /**< \brief (CCL) APB Base Address */ macro
450 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsaml21g16b.h390 #define CCL (0x43001C00) /**< \brief (CCL) APB Base Address */ macro
448 #define CCL ((Ccl *)0x43001C00UL) /**< \brief (CCL) APB Base Address */ macro
450 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsaml21g17b.h390 #define CCL (0x43001C00) /**< \brief (CCL) APB Base Address */ macro
448 #define CCL ((Ccl *)0x43001C00UL) /**< \brief (CCL) APB Base Address */ macro
450 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */
Dsaml21g18b.h390 #define CCL (0x43001C00) /**< \brief (CCL) APB Base Address */ macro
448 #define CCL ((Ccl *)0x43001C00UL) /**< \brief (CCL) APB Base Address */ macro
450 #define CCL_INSTS { CCL } /**< \brief (CCL) Instances List */

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