Searched refs:pin (Results 1 – 2 of 2) sorted by relevance
| /hal_atmel-3.7.0/scripts/ |
| D | sampinctrl.py | 144 def build_atmel_sam_gpio_sets(pin_cfgs, pin): argument
154 port, pin_num = get_port_pin(pin)
161 def build_atmel_sam_sets(pin_cfgs, pin, pin_lst, serie, variant, function): argument
181 port, pin_num = get_port_pin(pin)
202 for pin, pin_cfg in pins.items():
206 build_atmel_sam_gpio_sets(pin_cfgs, pin)
209 build_atmel_sam_sets(pin_cfgs, pin, pin_cfg["periph"],
212 build_atmel_sam_sets(pin_cfgs, pin, pin_cfg["extra"],
215 build_atmel_sam_sets(pin_cfgs, pin, pin_cfg["system"],
218 build_atmel_sam_sets(pin_cfgs, pin, pin_cfg["lpm"],
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| /hal_atmel-3.7.0/pinconfigs/ |
| D | README.md | 1 # Atmel SAM/SAM0 pin configurations
3 This directory contains a set of files describing valid pin configurations for
5 pin to a peripheral signal which multiplex, at end, I/O lines pins. For example,
7 for `SAM4E` SoC. These configurations can be used to generate valid pin
12 uses similar definitions where each pin has one or more associated alternate
22 All fields are common, independently of the pin controller, and all fields are
31 - `variants`: Each variant has a different set of valid pin combinations because
33 - `pins` (required): The pin map itself
136 of `samd51g` and `samde51g` pin mux. Note, some devices my present some
137 chalenges like define a part number which uses same pin code with different
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