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Searched refs:REG_PIOA_ESR (Results 1 – 7 of 7) sorted by relevance

/hal_atmel-3.7.0/asf/sam/include/sam3x/instance/
Dpioa.h69 #define REG_PIOA_ESR (0x400E0EC0U) /**< \brief (PIOA) Edge Select Register */ macro
113 #define REG_PIOA_ESR (*(__O uint32_t*)0x400E0EC0U) /**< \brief (PIOA) Edge Select Register */ macro
/hal_atmel-3.7.0/asf/sam/include/sam4e/instance/
Dpioa.h72 #define REG_PIOA_ESR (0x400E0EC0U) /**< \brief (PIOA) Edge Select Register */ macro
133 #define REG_PIOA_ESR (*(WoReg*)0x400E0EC0U) /**< \brief (PIOA) Edge Select Register */ macro
/hal_atmel-3.7.0/asf/sam/include/samv71b/instance/
Dpioa.h76 #define REG_PIOA_ESR (0x400E0EC0) /**< (PIOA) Edge Select Register */ macro
135 #define REG_PIOA_ESR (*(__O uint32_t*)0x400E0EC0U) /**< (PIOA) Edge Select Register */ macro
/hal_atmel-3.7.0/asf/sam/include/same70b/instance/
Dpioa.h76 #define REG_PIOA_ESR (0x400E0EC0) /**< (PIOA) Edge Select Register */ macro
135 #define REG_PIOA_ESR (*(__O uint32_t*)0x400E0EC0U) /**< (PIOA) Edge Select Register */ macro
/hal_atmel-3.7.0/asf/sam/include/same70/instance/
Dpioa.h76 #define REG_PIOA_ESR (0x400E0EC0) /**< (PIOA) Edge Select Register */ macro
135 #define REG_PIOA_ESR (*(__O uint32_t*)0x400E0EC0U) /**< (PIOA) Edge Select Register */ macro
/hal_atmel-3.7.0/asf/sam/include/samv71/instance/
Dpioa.h76 #define REG_PIOA_ESR (0x400E0EC0) /**< (PIOA) Edge Select Register */ macro
136 #define REG_PIOA_ESR (*(__O uint32_t*)0x400E0EC0U) /**< (PIOA) Edge Select Register */ macro
/hal_atmel-3.7.0/asf/sam/include/sam4s/instance/
Dpioa.h72 #define REG_PIOA_ESR (0x400E0EC0U) /**< \brief (PIOA) Edge Select Register */ macro
132 #define REG_PIOA_ESR (*(__O uint32_t*)0x400E0EC0U) /**< \brief (PIOA) Edge Select Register */ macro