Searched refs:PWM_IMR1_CHID0 (Results 1 – 7 of 7) sorted by relevance
184 #define PWM_IMR1_CHID0 (0x1u << 0) /**< \brief (PWM_IMR1) Counter Event on Channel 0 Interrupt Mask… macro
199 #define PWM_IMR1_CHID0 (0x1u << 0) /**< \brief (PWM_IMR1) Counter Event on Channel 0 Interrupt Mask… macro
213 #define PWM_IMR1_CHID0 (0x1u << 0) /**< \brief (PWM_IMR1) Counter Event on Channel 0 Interrupt Mask… macro
796 #define PWM_IMR1_CHID0 PWM_IMR1_CHID0_Msk /**< \de… macro
816 #define PWM_IMR1_CHID0 PWM_IMR1_CHID0_Msk /**< \de… macro