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Searched refs:PIN_PA04N_CCL_IN0 (Results 1 – 23 of 23) sorted by relevance

/hal_atmel-3.7.0/asf/sam0/include/samd51/pio/
Dsamd51g18a.h839 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
841 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsamd51g19a.h839 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
841 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsamd51j18a.h1072 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1074 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsamd51j19a.h1072 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1074 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsamd51j20a.h1072 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1074 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsamd51n19a.h1514 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1516 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsamd51n20a.h1514 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1516 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsamd51p19a.h1744 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1746 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsamd51p20a.h1744 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1746 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
/hal_atmel-3.7.0/asf/sam0/include/same51/pio/
Dsame51j18a.h1106 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1108 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsame51j19a.h1106 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1108 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsame51j20a.h1106 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1108 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsame51n19a.h1548 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1550 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsame51n20a.h1548 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1550 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
/hal_atmel-3.7.0/asf/sam0/include/same53/pio/
Dsame53j18a.h1125 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1127 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsame53j19a.h1125 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1127 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsame53j20a.h1125 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1127 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsame53n20a.h1603 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1605 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsame53n19a.h1603 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1605 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
/hal_atmel-3.7.0/asf/sam0/include/same54/pio/
Dsame54n19a.h1637 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1639 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsame54n20a.h1637 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1639 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsame54p19a.h1875 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1877 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
Dsame54p20a.h1875 #define PIN_PA04N_CCL_IN0 _L_(4) /**< \brief CCL signal: IN0 on PA04 mux N */ macro
1877 #define PINMUX_PA04N_CCL_IN0 ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)