Searched refs:val32 (Results 1 – 3 of 3) sorted by relevance
332 uint32_t val32; in m2m_ate_start_tx() local409 val32 = strM2mAteTx->peer_mac_addr[5] << 0; in m2m_ate_start_tx()410 val32 |= strM2mAteTx->peer_mac_addr[4] << 8; in m2m_ate_start_tx()411 val32 |= strM2mAteTx->peer_mac_addr[3] << 16; in m2m_ate_start_tx()412 nm_write_reg(rBurstTx_NMI_MAC_ADDR_LO_PEER, val32 ); in m2m_ate_start_tx()414 val32 = strM2mAteTx->peer_mac_addr[2] << 0; in m2m_ate_start_tx()415 val32 |= strM2mAteTx->peer_mac_addr[1] << 8; in m2m_ate_start_tx()416 val32 |= strM2mAteTx->peer_mac_addr[0] << 16; in m2m_ate_start_tx()417 nm_write_reg(rBurstTx_NMI_MAC_ADDR_HI_PEER, val32 ); in m2m_ate_start_tx()489 uint32 val32; in m2m_ate_start_rx() local[all …]
68 uint32 val32 = u32Conf; in chip_apply_conf() local71 val32 |= rHAVE_USE_PMU_BIT; in chip_apply_conf()74 val32 |= rHAVE_SLEEP_CLK_SRC_RTC_BIT; in chip_apply_conf()76 val32 |= rHAVE_SLEEP_CLK_SRC_XO_BIT; in chip_apply_conf()79 val32 |= rHAVE_EXT_PA_INV_TX_RX; in chip_apply_conf()82 val32 |= rHAVE_LEGACY_RF_SETTINGS; in chip_apply_conf()85 val32 |= rHAVE_LOGS_DISABLED_BIT; in chip_apply_conf()88 val32 |= rHAVE_RESERVED1_BIT; in chip_apply_conf()90 nm_write_reg(rNMI_GP_REG_1, val32); in chip_apply_conf()91 if(val32 != 0) { in chip_apply_conf()[all …]
1177 uint32 val32; in spi_init_pkt_sz() local1180 val32 = nm_spi_read_reg(SPI_BASE+0x24); in spi_init_pkt_sz()1181 val32 &= ~(0x7 << 4); in spi_init_pkt_sz()1184 case 256: val32 |= (0 << 4); break; in spi_init_pkt_sz()1185 case 512: val32 |= (1 << 4); break; in spi_init_pkt_sz()1186 case 1024: val32 |= (2 << 4); break; in spi_init_pkt_sz()1187 case 2048: val32 |= (3 << 4); break; in spi_init_pkt_sz()1188 case 4096: val32 |= (4 << 4); break; in spi_init_pkt_sz()1189 case 8192: val32 |= (5 << 4); break; in spi_init_pkt_sz()1192 nm_spi_write_reg(SPI_BASE+0x24, val32); in spi_init_pkt_sz()
