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Searched refs:REG_TC3_QISR (Results 1 – 4 of 4) sorted by relevance

/hal_atmel-3.6.0/asf/sam/include/same70/instance/
Dtc3.h81 #define REG_TC3_QISR (0x400540D4) /**< (TC3) QDEC Interrupt Status Register */ macro
131 #define REG_TC3_QISR (*(__I uint32_t*)0x400540D4U) /**< (TC3) QDEC Interrupt Status Reg… macro
/hal_atmel-3.6.0/asf/sam/include/same70b/instance/
Dtc3.h81 #define REG_TC3_QISR (0x400540D4) /**< (TC3) QDEC Interrupt Status Register */ macro
131 #define REG_TC3_QISR (*(__I uint32_t*)0x400540D4U) /**< (TC3) QDEC Interrupt Status Reg… macro
/hal_atmel-3.6.0/asf/sam/include/samv71/instance/
Dtc3.h81 #define REG_TC3_QISR (0x400540D4) /**< (TC3) QDEC Interrupt Status Register */ macro
132 #define REG_TC3_QISR (*(__I uint32_t*)0x400540D4U) /**< (TC3) QDEC Interrupt Status Reg… macro
/hal_atmel-3.6.0/asf/sam/include/samv71b/instance/
Dtc3.h81 #define REG_TC3_QISR (0x400540D4) /**< (TC3) QDEC Interrupt Status Register */ macro
131 #define REG_TC3_QISR (*(__I uint32_t*)0x400540D4U) /**< (TC3) QDEC Interrupt Status Reg… macro