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Searched refs:REG_PIOC_IMR (Results 1 – 7 of 7) sorted by relevance

/hal_atmel-3.6.0/asf/sam/include/sam4e/instance/
Dpioc.h50 #define REG_PIOC_IMR (0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register */ macro
105 #define REG_PIOC_IMR (*(RoReg*)0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register */ macro
/hal_atmel-3.6.0/asf/sam/include/sam3x/instance/
Dpioc.h50 …#define REG_PIOC_IMR (0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register … macro
94 …#define REG_PIOC_IMR (*(__I uint32_t*)0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register … macro
/hal_atmel-3.6.0/asf/sam/include/samv71b/instance/
Dpioc.h52 #define REG_PIOC_IMR (0x400E1248) /**< (PIOC) Interrupt Mask Register */ macro
111 #define REG_PIOC_IMR (*(__I uint32_t*)0x400E1248U) /**< (PIOC) Interrupt Mask Register … macro
/hal_atmel-3.6.0/asf/sam/include/sam4s/instance/
Dpioc.h50 …#define REG_PIOC_IMR (0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register… macro
104 …#define REG_PIOC_IMR (*(__I uint32_t*)0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register… macro
/hal_atmel-3.6.0/asf/sam/include/same70b/instance/
Dpioc.h52 #define REG_PIOC_IMR (0x400E1248) /**< (PIOC) Interrupt Mask Register */ macro
111 #define REG_PIOC_IMR (*(__I uint32_t*)0x400E1248U) /**< (PIOC) Interrupt Mask Register … macro
/hal_atmel-3.6.0/asf/sam/include/same70/instance/
Dpioc.h52 #define REG_PIOC_IMR (0x400E1248) /**< (PIOC) Interrupt Mask Register */ macro
111 #define REG_PIOC_IMR (*(__I uint32_t*)0x400E1248U) /**< (PIOC) Interrupt Mask Register … macro
/hal_atmel-3.6.0/asf/sam/include/samv71/instance/
Dpioc.h52 #define REG_PIOC_IMR (0x400E1248) /**< (PIOC) Interrupt Mask Register */ macro
112 #define REG_PIOC_IMR (*(__I uint32_t*)0x400E1248U) /**< (PIOC) Interrupt Mask Register … macro