Searched refs:REG_PIOC_IMR (Results 1 – 7 of 7) sorted by relevance
50 #define REG_PIOC_IMR (0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register */ macro105 #define REG_PIOC_IMR (*(RoReg*)0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register */ macro
50 …#define REG_PIOC_IMR (0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register … macro94 …#define REG_PIOC_IMR (*(__I uint32_t*)0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register … macro
52 #define REG_PIOC_IMR (0x400E1248) /**< (PIOC) Interrupt Mask Register */ macro111 #define REG_PIOC_IMR (*(__I uint32_t*)0x400E1248U) /**< (PIOC) Interrupt Mask Register … macro
50 …#define REG_PIOC_IMR (0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register… macro104 …#define REG_PIOC_IMR (*(__I uint32_t*)0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register… macro
52 #define REG_PIOC_IMR (0x400E1248) /**< (PIOC) Interrupt Mask Register */ macro112 #define REG_PIOC_IMR (*(__I uint32_t*)0x400E1248U) /**< (PIOC) Interrupt Mask Register … macro