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Searched refs:REG_PIOA_IFDR (Results 1 – 7 of 7) sorted by relevance

/hal_atmel-3.6.0/asf/sam/include/sam3x/instance/
Dpioa.h42 …#define REG_PIOA_IFDR (0x400E0E24U) /**< \brief (PIOA) Glitch Input Filter Disa… macro
86 …#define REG_PIOA_IFDR (*(__O uint32_t*)0x400E0E24U) /**< \brief (PIOA) Glitch Input Filter Disa… macro
/hal_atmel-3.6.0/asf/sam/include/sam4e/instance/
Dpioa.h42 #define REG_PIOA_IFDR (0x400E0E24U) /**< \brief (PIOA) Glitch Input Filter Disable Re… macro
103 #define REG_PIOA_IFDR (*(WoReg*)0x400E0E24U) /**< \brief (PIOA) Glitch Input Filter Disable Re… macro
/hal_atmel-3.6.0/asf/sam/include/samv71b/instance/
Dpioa.h44 #define REG_PIOA_IFDR (0x400E0E24) /**< (PIOA) Glitch Input Filter Disable Register */ macro
103 #define REG_PIOA_IFDR (*(__O uint32_t*)0x400E0E24U) /**< (PIOA) Glitch Input Filter Disa… macro
/hal_atmel-3.6.0/asf/sam/include/same70b/instance/
Dpioa.h44 #define REG_PIOA_IFDR (0x400E0E24) /**< (PIOA) Glitch Input Filter Disable Register */ macro
103 #define REG_PIOA_IFDR (*(__O uint32_t*)0x400E0E24U) /**< (PIOA) Glitch Input Filter Disa… macro
/hal_atmel-3.6.0/asf/sam/include/same70/instance/
Dpioa.h44 #define REG_PIOA_IFDR (0x400E0E24) /**< (PIOA) Glitch Input Filter Disable Register */ macro
103 #define REG_PIOA_IFDR (*(__O uint32_t*)0x400E0E24U) /**< (PIOA) Glitch Input Filter Disa… macro
/hal_atmel-3.6.0/asf/sam/include/samv71/instance/
Dpioa.h44 #define REG_PIOA_IFDR (0x400E0E24) /**< (PIOA) Glitch Input Filter Disable Register */ macro
104 #define REG_PIOA_IFDR (*(__O uint32_t*)0x400E0E24U) /**< (PIOA) Glitch Input Filter Disa… macro
/hal_atmel-3.6.0/asf/sam/include/sam4s/instance/
Dpioa.h42 …#define REG_PIOA_IFDR (0x400E0E24U) /**< \brief (PIOA) Glitch Input Filter Dis… macro
102 …#define REG_PIOA_IFDR (*(__O uint32_t*)0x400E0E24U) /**< \brief (PIOA) Glitch Input Filter Dis… macro