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Searched refs:REG_PIOA_AIMMR (Results 1 – 7 of 7) sorted by relevance

/hal_atmel-3.6.0/asf/sam/include/sam3x/instance/
Dpioa.h68 …#define REG_PIOA_AIMMR (0x400E0EB8U) /**< \brief (PIOA) Additional Interrupt Mod… macro
112 …#define REG_PIOA_AIMMR (*(__I uint32_t*)0x400E0EB8U) /**< \brief (PIOA) Additional Interrupt Mod… macro
/hal_atmel-3.6.0/asf/sam/include/sam4e/instance/
Dpioa.h71 #define REG_PIOA_AIMMR (0x400E0EB8U) /**< \brief (PIOA) Additional Interrupt Modes Mas… macro
132 #define REG_PIOA_AIMMR (*(RoReg*)0x400E0EB8U) /**< \brief (PIOA) Additional Interrupt Modes Mas… macro
/hal_atmel-3.6.0/asf/sam/include/samv71b/instance/
Dpioa.h75 #define REG_PIOA_AIMMR (0x400E0EB8) /**< (PIOA) Additional Interrupt Modes Mask Register */ macro
134 #define REG_PIOA_AIMMR (*(__I uint32_t*)0x400E0EB8U) /**< (PIOA) Additional Interrupt Mod… macro
/hal_atmel-3.6.0/asf/sam/include/same70b/instance/
Dpioa.h75 #define REG_PIOA_AIMMR (0x400E0EB8) /**< (PIOA) Additional Interrupt Modes Mask Register */ macro
134 #define REG_PIOA_AIMMR (*(__I uint32_t*)0x400E0EB8U) /**< (PIOA) Additional Interrupt Mod… macro
/hal_atmel-3.6.0/asf/sam/include/same70/instance/
Dpioa.h75 #define REG_PIOA_AIMMR (0x400E0EB8) /**< (PIOA) Additional Interrupt Modes Mask Register */ macro
134 #define REG_PIOA_AIMMR (*(__I uint32_t*)0x400E0EB8U) /**< (PIOA) Additional Interrupt Mod… macro
/hal_atmel-3.6.0/asf/sam/include/samv71/instance/
Dpioa.h75 #define REG_PIOA_AIMMR (0x400E0EB8) /**< (PIOA) Additional Interrupt Modes Mask Register */ macro
135 #define REG_PIOA_AIMMR (*(__I uint32_t*)0x400E0EB8U) /**< (PIOA) Additional Interrupt Mod… macro
/hal_atmel-3.6.0/asf/sam/include/sam4s/instance/
Dpioa.h71 …#define REG_PIOA_AIMMR (0x400E0EB8U) /**< \brief (PIOA) Additional Interrupt Mo… macro
131 …#define REG_PIOA_AIMMR (*(__I uint32_t*)0x400E0EB8U) /**< \brief (PIOA) Additional Interrupt Mo… macro